AI Solution Architect I

HCL's interview process for this role typically consists of three rounds. The first round is an online technical screening focusing on aptitude and basic circuit concepts. The second round is a deep‑dive technical interview where interviewers assess your knowledge of STD‑cell design, EDA tools, and problem‑solving ability. The final HR round evaluates communication skills, cultural fit, and long‑term career goals. Preparation should include hands‑on practice with Cadence/Synopsys tools and revisiting fundamental semiconductor design principles.

HCL tech promotes a collaborative, innovation‑first culture where employees are encouraged to experiment and share ideas. The company offers flexible work arrangements, continuous learning programs, and a balanced focus on professional growth and personal well‑being.

Graduates (BE/BTech/MTech) in Electronics & Communication, Electrical, Computer Science, or related engineering streams. Minimum 60% aggregate in graduation (or CGPA 6.5/10). No active backlogs at the time of joining. Freshers or candidates with up to 2 years of relevant experience are eligible. Preferred batch years: 2024‑2026, but any recent graduate can apply.

Round 1: Online Technical Screening (aptitude + basic circuit questions) → Round 2: Technical Interview (design concepts, EDA tool proficiency, problem‑solving) → Round 3: HR Interview (fit, communication, career aspirations)

HCL Technologies is a global IT services powerhouse headquartered in India, known for delivering end‑to‑end digital solutions across industries such as banking, healthcare, telecom, and manufacturing. With a presence in more than 60 countries and a workforce of over 200,000 professionals, HCL has consistently been recognized for its innovation‑driven culture, strong client focus, and commitment to sustainability. The company invests heavily in emerging technologies like artificial intelligence, cloud computing, and semiconductor design, positioning itself as a preferred partner for enterprises seeking digital transformation. The AI Solution Architect I role is a junior‑level position that sits at the intersection of semiconductor design and AI‑enabled verification. The incumbent will work on standard‑cell (STD‑cell) circuit projects, contributing to the creation, validation, and optimization of digital logic blocks. Using industry‑standard Electronic Design Automation (EDA) tools, the architect will translate high‑level specifications into transistor‑level implementations, ensuring that designs meet performance, power, and area targets while adhering to strict design‑rule checks. This role offers a solid foundation for fresh engineering graduates to grow into senior design and architecture positions within HCL’s semiconductor practice. Key responsibilities include: 1. Implement digital logic cells using Cadence Virtuoso and Synopsys Custom Compiler based on project specifications. 2. Develop and verify circuit layouts with Spectre simulations, ensuring compliance with design rules and performance metrics. 3. Perform debugging and troubleshooting of existing standard‑cell library elements using Calibre for DRC/LVS checks. 4. Document design steps, maintain version‑controlled records, and update project tracking tools. 5. Collaborate with cross‑functional teams to gather feature requirements and align circuit blocks with client needs. 6. Participate in peer reviews and contribute to continuous improvement of design methodologies. 7. Assist senior architects in exploring AI‑driven optimization techniques for layout synthesis. 8. Stay updated with the latest EDA tool releases and industry best practices. The tech stack revolves around Cadence Virtuoso, Synopsys Custom Compiler, Spectre, and Calibre, complemented by scripting in Tcl/Python for automation. HCL offers a clear growth path: junior architects can progress to senior architect, lead designer, and eventually to principal architect or technology manager roles, with regular training, certifications, and mentorship programs. Joining HCL means becoming part of a collaborative, innovation‑centric environment where you can work on cutting‑edge semiconductor projects, gain exposure to AI‑enhanced design flows, and build a career with global impact.