Hardware Engineer

Qualcomm's interview process typically starts with a timed online aptitude test, followed by one or two technical rounds focusing on digital design, coding and problem‑solving. The final HR round assesses cultural fit and communication skills. Candidates should practice RTL coding, fundamentals of ASIC flow and be ready for scenario‑based questions.

Qualcomm India promotes a merit‑based, inclusive environment where engineers are encouraged to experiment and innovate. The company provides structured mentorship, regular learning sessions and a balanced work‑life approach, allowing employees to grow both technically and personally.

B.Tech/M.Tech in Computer Science, Electrical/Electronic Engineering or related fields; minimum 60% aggregate (or CGPA 6.5/10); graduating batch 2024‑2026; no active backlogs; strong fundamentals in digital design, programming and basic analog concepts.

Round 1: Online aptitude test (verbal, quantitative, logical reasoning) → Round 2: Technical interview (design concepts, coding, problem solving) → Round 3: HR interview (behavioral fit, motivations)

Qualcomm is a global leader in wireless technology with over three decades of innovation across mobile, automotive, health‑care, smart cities and robotics. Headquartered in San Diego, the company has a strong presence in India, driving cutting‑edge research and product development for next‑generation SoCs, modems and connectivity solutions. At Qualcomm India Private Limited, engineers work alongside world‑class scientists to translate breakthrough ideas into silicon that powers billions of devices worldwide. The culture emphasizes collaboration, continuous learning and a passion for solving complex problems that shape the future of communication. The role of a Hardware Engineer at Qualcomm focuses on the design, validation and optimization of System‑on‑Chip (SoC) blocks that enable high‑performance modem, multimedia, computer‑vision and image‑processing capabilities. You will be part of a cross‑functional team that bridges software implementation with hardware acceleration, ensuring that each subsystem meets stringent power, performance and area targets. This position is ideal for fresh graduates who are eager to apply theoretical knowledge to real‑world silicon and who thrive in a fast‑paced, innovation‑driven environment. **Key Responsibilities** 1. Participate in RTL coding, simulation and verification of digital and mixed‑signal blocks using Verilog/VHDL. 2. Develop and run testbenches, scripts (Tcl, Perl, Shell) for functional and timing validation. 3. Collaborate with architecture and software teams to translate algorithmic requirements into hardware implementations. 4. Perform low‑power analysis and implement power‑saving techniques across the SoC. 5. Assist in physical design activities, including floorplanning, placement, routing and timing closure. 6. Debug silicon bring‑up issues on FPGA prototypes and silicon bring‑up platforms. 7. Contribute to documentation, design reviews and technical specifications. 8. Stay updated with the latest RF/Analog/Mixed‑Signal design tools (Cadence, SpectreRF) and incorporate best practices. 9. Support post‑silicon validation, failure analysis and performance tuning. 10. Mentor junior team members and share knowledge through workshops and code reviews. **Tech Stack**: Verilog/VHDL, SystemVerilog, C/C++, Tcl/Perl, Cadence Virtuoso, SpectreRF, Synopsys Design Compiler, PrimeTime, FPGA prototyping platforms, Linux scripting. **Growth Path**: Engineers typically progress from Junior Engineer to Senior Engineer, then to Principal Engineer or Technical Lead, with opportunities to move into system architecture, product management or research roles. **Why Join Qualcomm?** The company offers exposure to industry‑leading technologies, a collaborative global network, competitive compensation, and a clear roadmap for career advancement. Fresh talent gets to work on products that reach millions of users, making a tangible impact on the future of connectivity.